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| CXP88800 CMOS 8-bit Single Chip Microcomputer Description The CXP88800 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP88616/88624, CXP88732/88740/88748 and CXP88852/88860. Piggyback/ evaluator type 100 pin QFP (Ceramic) Features * A wide instruction set (213 instructions) which cover various types of data. -- 16-bit operation/multiplication and division/ boolean bit operation instructions * Minimum instruction cycle 250ns at 16MHz operation 122s at 32kHz operation * Applicable EPROM LCC type 27C512 (Maximum capacity : 60K bytes for option1, 32K bytes for option2) * Incorporated RAM capacity 1600 bytes * Peripheral functions -- A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 20.0s/16MHz) -- Serial interface Incorporated 8-bit and 8-stage FIFO (auto transfer for 1 to 8 bytes), 1 channel 8-bit clock synchronous type, 1 channel -- Timer 8-bit timer, 8-bit timer/counter, 2 channels 19-bit time base timer, 32kHz timer/counter -- High precision timing pattern generator PPG 19-pin, 32-stage programmable, RTG 5 pins, 2 channels 5-bit, 8-stage FIFO (RECCTL control), 1 channel -- PWM/DA gate output PWM output 12 bits 2 channels (Repetitive frequency 62.5kHz/16MHz) DA gate pulse output 13 bits, 2 channels -- Analog signal input circuit Capstan FG amplifier circuit Drum FG amplifier circuit Drum PG amplifer circuit PBCTL amplifier circuit -- CTL write/rewrite circuit Recording current control circuit -- Servo input control Capstan FG, drum FG/PG, CTL input -- VSYNC separator -- FRC capture unit Incorporated 26-bit and 8-stage FIFO -- PWM output 14 bits, 1 channel -- VISS/VASS circuit Pulse duty auto detection circuit -- Remote control receiving circuit 8-bit pulse measurement counter with on-chip, 6-stage FIFO -- Tri-state output PPG output 1 pin, output 8 pins -- Psendo HSYNC output function -- High-speed head switching circuit * Interruption 20 factors, 15 vectors, multi-interruption possible * Standby mode SLEEP/STOP * Package 100-pin ceramic QFP Note) Mask option depends on the type of the CXP88800. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E96106-ST CXP88800 Pin Assignment in Piggyback Mode PB6/PPO14 PB7/PPO15 PA0/PPO0/HGO PA1/PPO1 PA2/PPO2 PA3/PPO3 PA4/PPO4 PA5/PPO5 PA6/PPO6 PA7/PPO7 PE0/SCK1 PE3/SYNC PE1/SO1 VSS NC 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PB5/PPO13 PB4/PPO12 PB3/PPO11 PB2/PPO10 PB1/PPO9 PB0/PPO8 PC7/RTO7 PC6/RTO6 PC5/RTO5 PC4/RTO4 PC3/RTO3 PC2/PPO18 PC1/PPO17 PC0/PPO16 PI7 PI6 PI5 PI4 PI3 PI2 PI1/EC/INT2 PI0/INT0/ENV-DET PD7/SI0 PD6/SO0 PD5/SCK0 PD4/CS0 PD3/TO/DDO/ADJ/SRVO PD2/PWM PD1/RMC PD0/INT1/NMI 1 2 3 4 5 6 80 79 78 77 76 75 PE5/EXI1 PE6/PWM0/DAA0 PE7/PWM1/DAA1 CFG DFG DPG VREFOUT AMPVSS CTLSAMPI CTLFAMPO CTLAG CTLAMP (+) CTLAMP (-) CTLCIN (-) CTLCIN (+) RECCTL (+) RECCTL (-) AMPVDD RECCAP VDD AN0/ANOUT AN1 AN2 AN3 PF0/AN4 PF1/AN5 AVDD AVREF AVSS PF2/AN6 TX TEX VDD PE2/SI1 PE4/EXI0 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 A12 A15 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 A6 A5 A4 A3 A2 A1 A0 NC D0 5 6 7 8 9 10 11 12 13 A7 4 3 2 NC 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC OE A10 CE D7 D6 14 15 16 17 18 19 20 A14 D4 VDD 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 GND NC D1 D2 D3 D5 A13 7 Note) 1. NC (Pin 90) is always connected to VDD. 2. VDD (Pins 61 and 89) are both connected to VDD. 3. VSS (Pins 41 and 88) are both connected to GND. 4. MP (Pin 39) is always connected to GND. -2- PG1/AN13 PG0/AN12 PF7/AN11 PF6/AN10 PF5/AN9 PF4/AN8 PF3/AN7 EXTAL XTAL RST PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 VSS MP CXP88800 Pin Assignment in Evaluator Mode PB6/PPO14 PB7PPO15 PA0/PPO0/HGO PA1/PPO1 PA2/PPO2 PA3/PPO3 PA4/PPO4 PA5/PPO5 PA6/PPO6 PA7/PPO7 PE0/SCK1 PE3/SYNC PE1/SO1 VSS NC 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PB5/PPO13 PB4/PPO12 PB3/PPO11 PB2/PPO10 PB1/PPO9 PB0/PPO8 PC7/RTO7 PC6/RTO6 PC5/RTO5 PC4/RTO4 PC3/RTO3 PC2/PPO18 PC1/PPO17 PC0/PPO16 PI7 PI6 PI5 PI4 PI3 PI2 PI1/EC/INT2 PI0/INT0/ENV-DET PD7/SI0 PD6/SO0 PD5/SCK0 PD4/CS0 PD3/TO/DDO/ADJ/SRVO PD2/PWM PD1/RMC PD0/INT1/NMI 1 2 3 4 5 6 80 79 78 77 76 75 PE5/EXI1 PE6/PWM0/DAA0 PE7/PWM1/DAA1 CFG DFG DPG VREFOUT AMPVSS CTLSAMPI CTLFAMPO CTLAG CTLAMP (+) CTLAMP (-) CTLCIN (-) CTLCIN (+) RECCTL (+) RECCTL (-) AMPVDD RECCAP VDD AN0/ANOUT AN1 AN2 AN3 PF0/AN4 PF1/AN5 AVDD AVREF AVSS PF2/AN6 A7/D7 TX TEX VDD PE2/SI1 PE4/EXI0 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 A12 A15 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 NC RD 5 6 7 8 9 10 11 12 13 4 3 2 NC 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC HALT A10 E/P I/T MON 14 15 16 17 18 19 20 A14 C1 VDD 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 SYNC GND RST WR NC C2 A13 7 Note) 1. NC (Pin 90) is always connected to VDD. 2. VDD (Pins 61 and 89) are both connected to VDD. 3. VSS (Pins 41 and 88) are both connected to GND. 4. MP (Pin 39) is always connected to GND. -3- PG1/AN13 PG0/AN12 PF7/AN11 PF6/AN10 PE5/AN9 PE4/AN8 PE3/AN7 EXTAL XTAL RST PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 VSS MP CXP88800 EPROM Read Timing (Ta=-20 to +75C, VDD=4.5 to 5.5V, VSS=0V) Item Address data input delay time Address data hold time Symbol Pin A0 to A15 D0 to D7 A0 to A15 D0 to D7 0 Min. Max. 75 Unit ns ns tACC tIH 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD Input data 0.2VDD D0 to D7 Product List Products Option item Mask product CXP CXP CXP CXP CXP CXP CXP 88616 88624 88732 88740 88748 88852 88860 Package ROM capacity Reset pin pull-up resistor Input circuit format1 Power-on reset circuit Existent/ Non-existent 16K bytes 24K bytes 100-pin plastic QFP 32K bytes 40K bytes 48K bytes 52K bytes 60K bytes Piggyback/evaluator product CXP88800 -U01Q CXP88800 -U02Q 100-pin ceramic QFP EPROM 60K bytes EPROM 32K bytes 27C512 used Existent TTL schmitt Non-existent Existent Existent/Non-existent CMOS schmitt/TTL schmitt Non-existent 1) The input circuit format can be selected for PE3/SYNC. -4- CXP88800 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking LCC type EPROM Pin 1 marking Pin 1 index Note) CPU probe Note) Evaluation cap should be connected to CPU probe. -5- CXP88800 Package Outline Unit: mm 100PIN PQFP (CERAMIC) PIN NO. 1 INDEX INDEX 100 18.7 16.3 0.2 81 81 100 PIN No. 1 INDEX 1 80 80 1 4.5 1.27 0.13 22.3 0.25 18.12 0.2 12.02 14.22 24.7 6.0 0.3 1.0 0.7 30 51 51 30 31 9.48 11.66 15.58 0.2 50 1.3 0.3 50 0.45 31 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE PQFP-100C-L01 AQFP100-C-0000-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 42 ALLOY 5.7g 3.57 0.36 JEDEC CODE + 0.05 0.15 - 0.02 0.50 0.25 10.44 MAX -6- 0.3 0.08 0.65 0.05 |
Price & Availability of CXP88800
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